Index of /sys/class/input/input16/device/physical_node/iommu/subsystem/dmar1/devices/0000:00:04.0/power_limits/

../
power_limit_0_max_uw                               18-Oct-2026 03:42                4096
power_limit_0_min_uw                               18-Oct-2026 03:42                4096
power_limit_0_step_uw                              18-Oct-2026 03:42                4096
power_limit_0_tmax_us                              18-Oct-2026 03:42                4096
power_limit_0_tmin_us                              18-Oct-2026 03:42                4096
power_limit_1_max_uw                               18-Oct-2026 03:42                4096
power_limit_1_min_uw                               18-Oct-2026 03:42                4096
power_limit_1_step_uw                              18-Oct-2026 03:42                4096
power_limit_1_tmax_us                              18-Oct-2026 03:42                4096
power_limit_1_tmin_us                              18-Oct-2026 03:42                4096