Index of /proc/thread-self/root/sys/class/iommu/dmar0/subsystem/dmar1/devices/0000:00:04.0/power_limits/

../
power_limit_0_max_uw                               18-Oct-2026 10:07                4096
power_limit_0_min_uw                               18-Oct-2026 10:07                4096
power_limit_0_step_uw                              18-Oct-2026 10:07                4096
power_limit_0_tmax_us                              18-Oct-2026 10:07                4096
power_limit_0_tmin_us                              18-Oct-2026 10:07                4096
power_limit_1_max_uw                               18-Oct-2026 10:07                4096
power_limit_1_min_uw                               18-Oct-2026 10:07                4096
power_limit_1_step_uw                              18-Oct-2026 10:07                4096
power_limit_1_tmax_us                              18-Oct-2026 10:07                4096
power_limit_1_tmin_us                              18-Oct-2026 10:07                4096